A DC-DC converter of synchronous rectification type is known as a switching power source device of high conversion efficiency which comprises a transformer, primary and secondary side circuits of the transformer. The primary side circuit comprises at least one main switching element and a primary winding of the transformer connected in series with a DC power source. The secondary side circuit comprises a secondary winding of the transformer electromagnetically coupled to the primary winding, and at least one rectifying switching element connected between the secondary winding and a load. The main switching element is turned on and off during the switching operation, and the rectifying switching element is driven synchronously with operation of the main switching element to supply a DC output to the load through the secondary side circuit. A prior art DC-DC converter of synchronous rectification type shown in FIG. 14, comprises first and second main MOS-FETs 2 and 3 as first and second main switching elements connected in series to a DC power source 1; a primary winding 4a of a transformer 4 connected between a junction of first and second main MOS-FETs 2 and 3 and a negative terminal of DC power source 1 through a current resonance capacitor 5 connected in series to primary winding 4a of transformer 4; a voltage pseudo resonance capacitor 6 connected between drain and source terminals of first main MOS-FET 2; first and second rectifying MOS-FETs 7 and 8 as first and second rectifying switching elements connected to secondary windings 4b and 4c of transformer 4; first and second output rectifying diodes 9 and 10 connected to source and drain terminals of respectively first and second rectifying MOS-FETs 7 and 8; and an output smoothing capacitor 11 connected between a center tap of secondary windings 4b and 4c and each source terminal of first and second rectifying MOS-FETs 7 and 8. Accordingly, a primary circuit is composed of first and second main MOS-FETs 2 and 3, primary winding 4a of transformer 4, current resonance capacitor 5 and voltage pseudo resonance capacitor 6, and a secondary circuit is composed of secondary windings 4b and 4c of transformer 4, first and second rectifying MOS-FETs 7 and 8, first and second output rectifying diodes 9 and 10 and output smoothing capacitor 11.
Transformer 4 comprises a drive winding 4d electromagnetically coupled with primary winding 4a, and a leakage inductance 4e as a current resonance reactor or coil connected in series to primary winding 4a. Drive winding 4d supplies active DC power to a drive power source port VCC of control circuit 21 through a rectifying diode 12 and a smoothing capacitor 13. Connected between a positive terminal of DC power source 1 and smoothing capacitor 13 is a trigger resistor 14 for introducing electric current from DC power source 1 to smoothing capacitor 13 at the time of start-up of the converter to electrically charge smoothing capacitor 13 so that control circuit 21 starts operation when smoothing capacitor 13 is charged to a certain voltage level. A charge pump circuit is made up of a rectifying diode 15 and a smoothing capacitor 16 connected in series between trigger resistor 14 and a junction of first and second main MOS-FETs 2 and 3 to provide DC power between power source terminals VB and VS on the high voltage side of control circuit 21. An output voltage detector 17 is connected to both ends of an output smoothing capacitor 11 to detect DC output voltage VO, and a photo-diode 19 of a photo-coupler 18 is connected between center tap of secondary windings 4b and 4c and output voltage detector 17. A detection output signal of photo-diode 19 is given to a photo-transistor 20 of photo-coupler 18 connected to a feedback signal input terminal VFB of control circuit 21.
Control circuit 21 comprises an oscillator 22; a D-flip flop (DFF) 23 for receiving outputs from oscillator 22; a first time-adding circuit 24 connected to one output terminal of DFF 23; a first buffer amplifier 25 for receiving outputs from first time-adding circuit 24; a second time-adding circuit 26 connected to the other output terminal of DFF 23; a level shifter 27 for receiving outputs from second time-adding circuit 26; and a second buffer amplifier 28 for receiving outputs from level shifter 27. Oscillator 22 generates pulse signals of the frequency which can vary in response to the level of output voltage VO, namely output signal from output voltage detector 17 given to feedback input terminal VFB of control circuit 21 through photo-coupler 18. DFF 23 receives pulse signals from oscillator 22 to produce first and second drive pulse signals VG1 and VG2 inverted from VG1 at one and the other output terminals. First and second time-adding circuits 24 and 26 add a dead time of a constant span to respectively first and second drive pulse signals VG1 and VG2 from DFF 23. First buffer amplifier 25 receives dead time-added first drive pulse signals VG1 from first time-adding circuit 24 and applies them to gate terminal of first main MOS-FET 2. Dead time-added second drive pulse signals VG2 is forwarded from second time-adding circuit 26 to level shifter 27 which elevates reference voltage level of dead time-added second drive pulse signals VG2 from ground level to voltage level at a junction between a source terminal of first main MOS-FET 2 and a drain terminal of second main MOS-FET 3. Second buffer amplifier 28 amplifies second drive pulse signals VG2 from level shifter 27 and forwards them to gate terminal of second main MOS-FET 3. This causes control circuit 21 to modulate frequency of first and second drive pulse signals VG1 and VG2 (PFM or Pulse Frequency Modulation) in response to voltage level of output signals detected by output voltage detector 17, and forwards them to each gate terminal of first and second main MOS-FETs 2 and 3 which therefore can alternately be turned on and off with the frequency corresponding to voltage level of output signals detected by output voltage detector 17.
Gate terminal of first main MOS-FET 2 is connected through a first capacitor 29 and a first pulse transformer 31 to a gate terminal of a first rectifying MOS-FET 7 so that first drive pulse signals VG1 from control circuit 21 is supplied through first capacitor 29 to a primary winding 32 of first pulse transformer 31 whose secondary winding 33 produces to gate terminal of first rectifying MOS-FET 7 first synchronous drive pulse signals VSC1 of the similar or same waveform to those of first drive pulse signals VG1. Also, gate terminal of second main MOS-FET 3 is connected through a second capacitor 30 and a second pulse transformer 34 to a gate terminal of a second rectifying MOS-FET 8 so that second drive pulse signals VG2 from control circuit 21 is supplied through second capacitor 30 to a primary winding 35 of second pulse transformer 34 whose secondary winding 36 produces to gate terminal of second rectifying MOS-FET 8 second synchronous drive pulse signals VSC2 of the similar or same waveform to those of second drive pulse signals VG2. This causes first and second rectifying MOS-FETs 7 and 8 on the secondary side to be turned on and off in synchronization with the on and off operation of first and second main MOS-FETs 2 and 3 on the primary side to generate to a load not shown DC output voltage VO of substantially constant level between output terminals of the secondary circuit.
In operation of the DC-DC converter of synchronous rectification type shown in FIG. 14, when a power switch not shown therein is turned on, an electric current flows from DC power source 1 through trigger resistor 14 to smoothing capacitor 13 to electrically charge smoothing capacitor 13. When charged voltage in smoothing capacitor 13 comes up to a start-up level for control circuit 21, it starts the operation. At the moment, control circuit 21 produces first and second drive pulse signals VG1 and VG2 to each gate terminal of first and second main MOS-FETs 2 and 3 to start turning them on and off. When second main MOS-FET 3 is turned on, a winding current IQ2 runs from DC power source 1 through second main MOS-FET 3, leakage inductance 4e and primary winding 4a of transformer 4 and current resonance capacitor 5 to DC power source 1 of primary side circuit to electrically charge current resonance capacitor 5. Winding current IQ2 is a composite current of excitation current through primary winding 4a of transformer 4 and resonance current of the resonance frequency determined by capacitance of current resonance capacitor 5 and leakage inductance 4e of transformer 4. As second rectifying MOS-FET 8 is concurrently turned on synchronously with turning-on operation of second main MOS-FET 3, an electric current IS2, which has substantially same resonance frequency as that of resonance current, flows from second secondary winding 4c of transformer 4 through a parallel circuit of second rectifying diode 10 and second rectifying MOS-FET 8 to output smoothing capacitor 11 and load.
When second main MOS-FET 3 is switched off while winding current IQ2 flows through primary side circuit, voltages VQ1 between drain and source terminals of first main MOS-FET 2 and VQ2 between drain and source terminals of second main MOS-FET 3, provide pseudo resonance voltage of the resonance frequency determined by capacitance of voltage pseudo resonance capacitor 6 and composite inductance of leakage inductance 4e and excitation inductance not shown of transformer 4. At the same time, excitation current, which has passed through primary winding 4a of transformer 4 and second main MOS-FET 3, is diverted toward a pseudo diode not shown but appearing between drain and source terminals of first main MOS-FET 2. When first main MOS-FET 2 is turned on while excitation current is diverted through pseudo diode of first main MOS-FET 2, this excitation current naturally decreases, and then, the polarity is inverted to cause electric current IQ1 to flow from current resonance capacitor 5 through primary winding 4a and leakage inductance 4e of transformer 4 and first main MOS-FET 2 to discharge current resonance capacitor 5. This electric current IQ1 through first main MOS-FET 2 has the adverse polarity to that of winding current IQ2, and provides a composite current of excitation current through primary winding 4a of transformer 4 and resonance current of the resonance frequency determined by capacitance of current resonance capacitor 5 and leakage inductance 4e of transformer 4. Also, as first rectifying MOS-FET 7 is turned on synchronously with the turning-on operation of first main MOS-FET 2, a rectified output current IS1, which has substantially same resonance frequency as that of resonance current, flows from first secondary winding 4b of transformer 4 through a parallel circuit of first rectifying diode 9 and first rectifying MOS-FET 7 to output smoothing capacitor 11 and load.
When first main MOS-FET 2 is switched off while electric current IQ1 flows through primary side circuit, voltages VQ1 between drain and source terminals of first main MOS-FET 2 and VQ2 between drain and source terminals of second main MOS-FET 3, provide pseudo resonance voltage of the resonance frequency determined by capacitance of voltage pseudo resonance capacitor 6 and composite inductance of leakage inductance 4e and excitation inductance not shown of transformer 4. At the same time, excitation current, which has passed through primary winding 4a of transformer 4 and first main MOS-FET 2, is diverted toward a pseudo diode not shown but appearing between drain and source terminals of second main MOS-FET 3. When second main MOS-FET 3 is turned on while excitation current is diverted through pseudo diode of second main MOS-FET 3, this excitation current naturally decreases, and then, the polarity is inverted to cause electric current IQ2 to flow through second main MOS-FET 3. FIGS. 15(A), 15(B) and 15(C) indicate respectively waveforms of voltage VQ1 between source and drain terminals of first main MOS-FET 2, electric current IQ1 through first main MOS-FET 2, and electric current through first secondary winding 4b of transformer 4.
After that, the above-mentioned synchronous rectifying operation is repeated to produce DC output voltage VO of substantially constant level from secondary side circuit to load. As switching frequency of first and second main MOF-FETs 2 and 3 is higher than resonance frequency determined by capacitance of current resonance capacitor 5 and leakage inductance 4e of transformer 4, DC output to load can be controlled by increasing switching frequency of first and second main MOS-FETs 2 and 3. A DC-DC converter of synchronous rectification type similar to the foregoing is shown by for example Japanese Patent Disclosure No. 2000-23455 (Page 5, FIG. 3).
Now, rectified output currents IS1 and IS2 flowing through secondary side circuit of transformer 4 do not exactly synchronize with the on-period of first and second main MOS-FETs 2 and 3 of primary side circuit as shown in FIGS. 15(C) and 15(A), since first and second rectifying MOS-FETs 7 and 8 of secondary side circuit are turned on synchronously with the turning-on of first and second main MOS-FETs 2 and 3 in DC-DC converter shown in FIG. 14. Accordingly, adverse current occurs which flows from output smoothing capacitor 11 toward first and second secondary windings 4b and 4c of transformer 4 because first and second rectifying MOS-FETs 7 and 8 are turned on during the period of no electric current through first and second output rectifying diodes 9 and 10 of secondary side circuit. This adverse current provides a circulating current which reciprocates between primary and secondary side circuits, and further disadvantageously incurs unnecessary switching loss through first and second main MOS-FETs 2 and 3 on primary side and first and second rectifying MOS-FETs 7 and 8, thereby detrimentally reducing the conversion efficiency in DC-DC converter.
Accordingly, an object of the present invention is to provide a DC-DC converter of synchronous rectification type capable of improving the conversion efficiency by reducing switching loss in secondary side circuit.